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Intel said it has made a significant breakthrough in the development of glass substrates for next-generation advanced packaging in an attempt to stay on the past of Moore’s Law.
The big chip maker said this milestone achievement is set to redefine the boundaries of transistor scaling, enabling the realization of data-centric applications and propelling the advancement of Moore’s Law, which predicts that the number of transistors on a chip will double every couple of years. Intel said it should be able to make the jump to glass substrates by the end of the decade. The company made the announcement ahead of its Intel Innovation 2023 conference in San Jose, California this week.
Chip technology has advanced far over the past six decades thanks to this doubling effect. In 1971, Intel’s first microprocessor had 2,300 transistors. Now the company’s flagship chips have more than 100 billion transistors. But much of that doubling came from miniaturizing the width between chip circuits. That kind of advance has slowed down, as chips layers are now on the atomic level.
So, Intel has been on the hunt for other ways to keep chip technology on the Moore’s Law treadmill. And it has found, oddly enough, a way forward by creating bigger and bigger chip packages, rather than smaller and smaller ones.
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Glass enables Intel to create a 50% larger chip area within a package so that Intel can fit more chips into a single electrical package.
By the end of the decade, Intel foresees 30 trillion transistors will be packaged on a glass substrate with other innovations such as 3D stacking of chips, said Rahul Manepalli, an Intel Fellow and director of substrate module engineering, in a press briefing.
“We’re taking the wraps off our glass core substrate technology, where we see glass core substrate brings continued feature scaling,” he said. “It allows us to do things that an organic package cannot do. It allows us to improve the power delivery to these power hungry, AI-centric, data-centric chips. It enables us to do high speed I/O signaling that’s not possible in organic packages, especially as you get to these switches with very high frequency at very low loss needs.”
Manepalli said it enables high manufacturing yields and low costs. The glass substrates will be one more option for faster and better connectivity alongside the other improvements like 3D packaging.
Chip packaging history
From the 1970s to 1990s, early microprocessors used lead frame wire packages. Then the industry made a transition to ceramic pins for packages. Then came organic flip-chip ball-grid arrays (BGAs). The lead-free and halogen-free solutions came in the early 2000s. Now Intel is trying to pack more chips in a single package. But there are limits to the organic packaging technology.
Now the chip packages are getting bigger and bigger, and AI is driving demand for more performance.
“We are at an inflection point,” he said. “We see glass core substrates enable significant improvements to both electrical and mechanical properties. We’ve shown through some of our internal studies that we can actually get up to 10 times or more through whole density in a glass core compared to an organic core.”
Intel has been pulling a lot of tricks lately to improve interconnections between chips. It is putting multiple chips into a single electronic package. Manepalli that Intel has been shipping its current multi-die interconnect technology since 2017.
The company has been scaling that from 55 micron die pitch in its factories to 45 microns and 36 microns. Intel has also been stacking with its 2.5D technology since 2019, and it is implementing its 3D chip stacking technology Foveros for chip packages as well.
Advantages of glass substrates
Today’s chips sit on substrates that connect them to a larger circuit board, known as a motherboard. Copper interconnects are usually used to electrically connect a chip to the motherboard. But Intel has figured out a way to do it faster with glass.
For the past decade, Intel has been doing research on glass. And in the past 3.5 years, the company has done accelerated “pathfinding” to bring a product to life. And it has integrated that effort with an R&D factory line in Chandler, Arizona, fueled by a billion-dollar investment in glass processing. Intel has been working closely with semiconductor equipment, materials and chemistry partners. Manepalli said Intel has over 600 inventions in the area related to substrates and glass technology.
“We’re excited to take the wraps off of it and bring this to you and open this up for everyone to come and collaborate with us in the space,” Manepalli said.
Compared to conventional organic substrates, glass substrates offer a myriad of advantages, including ultra-low flatness, enhanced thermal and mechanical stability, and significantly higher interconnect density. These unique properties empower chip architects to create high-density, high-performance chip packages specifically designed for data-intensive workloads, such as artificial intelligence (AI).
Glass substrates offer numerous benefits, including the ability to withstand higher temperatures, 50% less pattern distortion, ultra-low flatness for improved depth of focus during lithography, and exceptional dimensional stability, enabling tight layer-to-layer interconnect overlay. These distinctive properties allow for a tenfold increase in interconnect density on glass substrates. Additionally, the improved mechanical properties of glass enable the creation of ultra-large form-factor packages with high assembly yields.
Intel said it is on track to introduce comprehensive glass substrate solutions to the market in the latter half of this decade, ensuring the continuation of Moore’s Law well beyond 2030.
Approaching the limits
As the demand for more powerful computing increases and the semiconductor industry moves into the heterogeneous era that uses multiple “chiplets” in a package, improvements in signaling speed, power delivery, design rules and stability of package substrates will be essential.
The semiconductor industry is approaching the limits of transistor scaling on silicon packages using organic materials. These materials are plagued by limitations such as increased power consumption, shrinkage, and warping.
Consequently, scaling transistors is becoming increasingly challenging. Glass substrates present a viable and indispensable solution for the next generation of semiconductors, propelling the industry forward.
Glass substrates possess superior mechanical, physical, and optical properties, making them essential for improving signaling speed, power delivery, design rules, and substrate stability.
These properties enable the connection of more transistors within a package, facilitating better scaling and allowing for the assembly of larger chiplet complexes, known as “system-in-package,” compared to existing organic substrates. Chip architects can now achieve higher performance and density gains within a smaller footprint, providing greater flexibility, lower overall cost, and reduced power consumption.
The initial applications for glass substrates will focus on areas where their advantages can be maximized, such as data centers, AI, and graphics-intensive workloads that require larger form factor packages and higher speed capabilities, Intel said.
The tolerance of glass substrates to higher temperatures provides chip architects with flexibility in defining design rules for power delivery and signal routing. This flexibility enables the seamless integration of optical interconnects and the incorporation of inductors and capacitors into the glass during high-temperature processing.
As a result of these distinctive properties, a 10 times increase in interconnect density is possible on glass substrates. Further, improved mechanical properties of glass enable ultra-large form-factor packages with very high assembly yields. That can bring the industry closer to the goal of scaling a trillion transistors on a package by 2030.
Intel has dedicated over a decade to researching and evaluating the reliability of glass substrates as a replacement for organic substrates. The company has a rich history of driving advancements in packaging technology, including leading the industry’s transition from ceramic to organic packages and pioneering halogen and lead-free packages.
Intel’s expertise in advanced embedded die packaging technologies and active 3D stacking has fostered an entire ecosystem of equipment, chemical, and materials suppliers, as well as substrate manufacturers.
Looking ahead, Intel’s industry-leading glass substrates for advanced packaging, coupled with recent breakthroughs in PowerVia and RibbonFET technologies, demonstrate the company’s commitment to pushing the boundaries of compute technology beyond the Intel 18A process node. Intel is steadfast in its pursuit of achieving 1 trillion transistors in a package by 2030, and its ongoing innovation in advanced packaging, including glass substrates, will play a pivotal role in realizing this ambitious goal.
In summary, he said glass offers higher temperature tolerances and greater interconnect density as a result. Glass substrates have ultra-low flatness, which results in better image capture. Intel can create finer threads through the 10 times better interconnect density and drop those interconnects from the bottom of the package to another chip. Design flexibility and power delivery and signal routing becomes easier. Glass can also connect more easily with optical equipment.
Intel will know more about the costs in the second half of the decade, but Manepalli said the company expects that it will have fewer layers on each chip and lower costs as a result. Not all of the problems have been solved yet, he said, but Intel feels confident it will be able to overcome the challenges.
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